Sr. Principal DSP Architect Job at Astera Labs, Santa Rosa, CA

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  • Astera Labs
  • Santa Rosa, CA

Job Description

Job Description:

As a Sr. Principal DSP Architect, you will join a team of DSP/Systems experts, digital designers, and mixed-signal design engineers developing advanced DSP SerDes for next-generation 400G per lane wireline and optical interconnect for AI systems. The DSP architecture team is responsible for the following job functions.

  • Research novel modulation, equalization, and FEC techniques for 400G per lane wireline and optical systems.
  • Create DSP and FEC algorithms, bit/cycle-accurate C/C++ models, and hardware block specifications appropriate for RTL implementation.
  • Work with the digital team/firmware team to optimize and implement DSP algorithms in hardware/firmware.
  • Hands-on involvement in post-silicon performance tuning and optimization.
  • Guide test plans for lab characterization.
  • Provide support for internal customers deploying SerDes IP.

Basic Qualifications:

Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience with DSP architectures and algorithm development.

Required Skills:

  • Solid understanding of and experience with designing adaptive DSP algorithms.
  • Solid understanding of and experience with the practical aspects of digital communication and signal processing theory, including channel equalization, timing recovery, detection, and estimation.
  • Good programming skills in C/C++, Matlab or Python.
  • Experience in guiding and testing the transfer of high-speed numerical algorithms from C/C++ to Verilog.

Additional Useful Skills:

  • Familiarity with high-speed optical and electrical channels and the DSP algorithms to compensate for their impairments.
  • Reading knowledge of Verilog RTL and the ability to assist with assessing Verilog implementations of DSP algorithms.
  • Experienced with modern version control and software management systems.
  • Experience with error correction (Reed-Solomon, BCH, soft decoding) in high-throughput, low-latency systems.

The base salary range is $160,000.00 USD—$260,000.00 USD. Your base salary will be determined based on location, experience, and similar-position employees' pay.

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