FPGA Engineer Job at EVONA, Irvine, CA

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  • EVONA
  • Irvine, CA

Job Description

Our client are seeking a highly skilled FPGA Engineer to join their team. The ideal candidate should have a strong background in digital design, VHDL/Verilog/SystemVerilog programming, and experience with FPGA development tools and methodologies.

Key Responsibilities

  • Design, implement and verify RTL code for image sensor configuration and high-throughput readout
  • Develop and optimize RAM buffering techniques for efficient data handling
  • Collaborate with hardware and software teams to define FPGA requirements and specifications
  • Support RDT&E efforts of new space-based payloads
  • Implement and optimize signal processing and routing algorithms in RTL
  • Integration of RTL designs onto FPGA/SoC platforms
  • Perform synthesis, place and route, timing analysis and FPGA implementation
  • Verification and validation of RTL designs on prototype and flight hardware
  • Collaborate with multidisciplinary team to ensure system functionality
  • Lead verification and validation of FPGA based boards
  • Required: 2+ years of experience developing HDL for FPGAs in a professional environment
  • Bachelor’s degree in electrical engineering, computer science, mathematics or a related field
  • Proficiency in RTL design using VHDL, Verilog and/or SystemVerilog
  • Proficiency working with FPGA design tools
  • Strong understanding of digital design principles and methodologies.
  • Must be able to obtain a Secret and/or a TS/SCI clearance.
  • Must be available to work extended hours and weekends as needed to meet critical deadlines

Preferred:

  • Experience implementing HDL for precise timing applications
  • Experience with high-speed serial interfaces (e.g. GbE, PCI-E, LVDS)
  • Experience with low-speed serial interfaces (e.g. RS422, CAN, SPI)
  • Experience with dynamic RAM controllers and layout.
  • Knowledge of RAM architectures and efficient buffering techniques
  • Experience with image sensors and camera systems
  • Experience implementing computer vision and digital signal processing algorithms in RTL
  • Experience with Xilinx and Microchip FPGA systems and toolchains
  • Experience with networking protocols and packet processing (Ethernet 802.3, IPV4/IPV4, UDP, TCP)
  • Proficiency in software development (C/C++/Python)
  • Strong documentation and collaboration skills
  • Strong problem-solving skills and attention to detail.
  • Familiarity with hardware description languages (HDL) and high-level synthesis (HLS) tools.

Job Tags

Weekend work,

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